发明名称 |
Method and apparatus for a process, voltage, and temperature variation tolerant semiconductor device |
摘要 |
A method and apparatus to reduce the degradation in performance of semiconductor-based devices due to process, voltage, and temperature (PVT) and/or other causes of variation. Adaptive feedback mechanisms are employed to sense and correct performance degradation, while simultaneously facilitating configurability within integrated circuits (ICs) such as programmable logic devices (PLDs). A voltage-feedback mechanism is employed to detect PVT variation and mirrored current references are adaptively adjusted to track and substantially eliminate the PVT variation. More than one voltage-feedback mechanism may instead be utilized to detect PVT-based variations within a differential device, whereby a first voltage-feedback mechanism is utilized to detect common-mode voltage variation and a second voltage-feedback mechanism produces mirrored reference currents to substantially remove the common-mode voltage variation and facilitate symmetrical operation of the differential device. |
申请公布号 |
US8058924(B1) |
申请公布日期 |
2011.11.15 |
申请号 |
US20090361804 |
申请日期 |
2009.01.29 |
申请人 |
REN GUO JUN;RAU PRASAD;TAN JIAN;ZHANG QI;XILINX, INC. |
发明人 |
REN GUO JUN;RAU PRASAD;TAN JIAN;ZHANG QI |
分类号 |
G05F1/10;G05F3/02 |
主分类号 |
G05F1/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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