ESD clamp for high voltage operation

摘要

An electrostatic discharge (ESD) clamp includes a first power source configured to provide a first power supply voltage, a power supply node coupled to the first power source and receiving the power supply voltage; and a first NMOS transistor and a second NMOS transistor coupled in series and between the power supply node and a VSS node. The first NMOS transistor and the second NMOS transistor are low nominal VDD devices with maximum endurable voltages lower than the power supply voltage. The ESD claim further includes an ESD detection circuit including a capacitor coupled between the power supply node and a gate of the second NMOS transistor, and a resistor coupled between the gate of the second NMOS transistor and the VSS node.