发明名称 SYSTEME UND VERFAHREN FÜR ASYNCHRONEN TRANSFER MODE UND INTERNET-PROTOKOLL
摘要 A protocol-independent error-control system includes several components (840a, 830a, 820a, 150b, 820b, 830b, 840b) that assist in providing more reliable data transmission between endpoints (110, 120): 1) an ATM adaptation layer that supports quality-critical and time-critical data; 2) a rate converter that uses a priority scheme to adjust the data rate for different types of data; and 3) an error-control subsystem that implements a data link protocol optimized for error-prone links, and capable of recognizing traffic from many kinds of network sources. The error-control subsystem may be used alone or in combination with the ATM adaptation layer (170, 172, 180, 182) and/or the rate converter (830).
申请公布号 AT533241(T) 申请公布日期 2011.11.15
申请号 AT19990969195T 申请日期 1999.09.16
申请人 SCIENTIFIC RESEARCH CORPORATION 发明人 ALESSI, GEORGE;RAY, CHARLES;AKYILDIZ, IAN;JENSEN, MARK;SMITH, GUY
分类号 H04J3/16;H04J3/22;H04J3/24;H04L1/00;H04L1/18;H04L12/56;H04L29/06;H04Q11/04 主分类号 H04J3/16
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