发明名称 PIPELINE TYPE A/D CONVERTER
摘要 <P>PROBLEM TO BE SOLVED: To provide a pipeline type A/D converter which increases an input range and the number of bits of a digital output signal without making large a thermal noise or an open loop gain that an operational amplifier is requested to have. <P>SOLUTION: An input range is widened by increasing the number of capacitors usable to add and subtract a reference voltage by dividing the number M of sample holding capacitors by N and further increasing the reference voltage by N times, and thereby increasing the number of bits of the digital output signal. In this case, all the capacitors sample an analog signal, so that no thermal noise is made worse before and after dividing the capacitors. Further, the ratio of capacitors used as a feedback element for amplifying an analog signal and the remaining capacitors is unchanged even before and after the capacitors are divided, so that the open loop gain that the operational amplifier 128 is requested to have is not increased. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2011229128(A) 申请公布日期 2011.11.10
申请号 JP20110048194 申请日期 2011.03.04
申请人 ASAHI KASEI ELECTRONICS CO LTD 发明人 EGAWA KAZUKI
分类号 H03M1/18;H03M1/14 主分类号 H03M1/18
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