发明名称 |
CIRCUIT AND METHOD FOR CONTROLLING A CLOCK SYNCHRONIZING CIRCUIT FOR LOW POWER REFRESH OPERATION |
摘要 |
A method and apparatus is provided for idling a clock synchronizing circuit during at least a portion of time during execution of a refresh operation in a memory device. In a memory device receiving an external clock signal, a method and apparatus for executing a refresh operation is provided that includes initiating at least one refresh operation in the memory device, and ceasing generation of an internal clock signal timed with respect to the external clock signal for at least a portion of the time in which at least one refresh operation takes to complete.
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申请公布号 |
US2011273938(A1) |
申请公布日期 |
2011.11.10 |
申请号 |
US201113184930 |
申请日期 |
2011.07.18 |
申请人 |
ROUND ROCK RESEARCH, LLC |
发明人 |
SCHOENFELD AARON M.;DERMOTT ROSS E. |
分类号 |
G11C7/10;G11C7/22;G11C8/10;G11C11/406 |
主分类号 |
G11C7/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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