发明名称 Reduced wafer warpage in semiconductors by stress engineering in the metallization system
摘要 In complex metallization systems of sophisticated semiconductor devices, appropriate stress compensation mechanisms may be implemented in order to reduce undue substrate deformation during the overall manufacturing process. For example, additional dielectric material and/or functional layers of one or more metallization layers may be provided with appropriate internal stress levels so as to maintain substrate warpage at a non-critical level, thereby substantially reducing yield losses in the manufacturing process caused by non-reliable attachment of substrates to substrate holders in process and transport tools.
申请公布号 US8053354(B2) 申请公布日期 2011.11.08
申请号 US20090561701 申请日期 2009.09.17
申请人 GLOBALFOUNDRIES INC. 发明人 LEHR MATTHIAS;KOSCHINSKY FRANK;HOHAGE JOERG
分类号 H01L21/4763 主分类号 H01L21/4763
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