发明名称 |
Integrated circuit package and manufacturing method thereof |
摘要 |
An IC package includes: a multi-layered PCB having a plurality of insulating layers and a plurality of conductive pattern layers stacked in sequence and a plurality of via-holes formed through the plurality of the insulating layers for an electrical connection between the layers; and an IC chip disposed in a core insulating layer of the plurality of the insulating layers to be embedded in the multi-layered PCB and including a plurality of input/output pads on their surface. The input/output pads disposed at an outermost area of the IC chip are coupled to outer terminals by connection members without passing through said via-hole, the remaining input/output pads except for the input/output pads disposed at the outermost area of the IC chip are coupled to the outer terminals through the via-hole.
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申请公布号 |
US8053681(B2) |
申请公布日期 |
2011.11.08 |
申请号 |
US20080201153 |
申请日期 |
2008.08.29 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
JUNG JI-HYUN;CHO SHI-YUN;LEE YOUNG-MIN;CHOI YOUN-HO |
分类号 |
H05K1/16 |
主分类号 |
H05K1/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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