发明名称 Precesion/speed compromise of a synchronization signal reception device
摘要 A reception device is able to receive packets in a communication network comprising at least two stations. The device is capable of receiving packets containing samples of the network which originate from data sampled every period Tsmp, where Tsmp emanates from a time base synchronized on all the stations of the said network; regenerating a counting ramp with the aid of a loop receiving the samples and furthermore delivering local samples every period Tsmp and a clock. The phase-locked loop comprises: a samples comparator comparing the samples and the local samples and delivering an error signal; a corrector receiving the signal and delivering a corrected error signal, the corrector having a static gain equal to 1; a digital oscillator receiving the corrected error signal and delivering the clock, which has a frequency dependent on the signal and is proportional to a gain. According to the invention, the phase-locked loop comprises, furthermore, a gain adjustment device which determines a gain value as a function of the error signal.
申请公布号 US8054859(B2) 申请公布日期 2011.11.08
申请号 US20080452051 申请日期 2008.06.06
申请人 THOMSON LICENSING 发明人 DEFRANCE SERGE;TAPIE THIERRY;AUTIER INGRID
分类号 H04J3/06;H04N7/24 主分类号 H04J3/06
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