发明名称 SEMICONDUCTOR DEVICE COMPRSING ISOLATION LAYER AND FABRICATING METHOD FOR THE SAME
摘要 PURPOSE: A semiconductor device formation method which includes a device separation layer is provided to suppress the silicon consumption of an active area, thereby suppressing deterioration in a hot electron induced punch-through(HEIP) property of a PMOS(P-channel Metal-Oxide-Semiconductor) transistor. CONSTITUTION: A device separation trench(101) establishing an active area is arranged in a semiconductor substrate. A thermal oxide layer(310) is arranged by thermally oxidizing the floor and lateral wall of the trench. A tetra-ethyl-ortho-silicate(TEOS) layer is evaporated on a thermal oxide layer. A liner layer including the thermal oxide layer, the TEOS layer, a silicon nitride layer, and a silicon oxide layer is arranged by successively evaporating the silicon nitride layer and silicon oxide layer on the TEOS layer. A device separation layer filling the trench is arranged on the liner layer.
申请公布号 KR20110121466(A) 申请公布日期 2011.11.07
申请号 KR20100041066 申请日期 2010.04.30
申请人 HYNIX SEMICONDUCTOR INC. 发明人 EUN, BYUNG SOO
分类号 H01L21/76 主分类号 H01L21/76
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