MEMORY CHIP AND MULTI-CHIP PACKAGE

摘要

PROBLEM TO BE SOLVED: To reduce power consumed by an input buffer without dropping any input data.

SOLUTION: An address cycle discrimination circuit 74 detects an end of input cycle of writing destination address, and outputs a final address cycle signal earlier than output of a chip selection signal. A buffer controller (AND circuit 75, OR circuit 76 and OR circuit 72) puts an input buffer 61 into an active state while the final address cycle signal is high regardless of the status of the chip selection signal.

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