| 摘要 |
Disclosed is a logical circuit emulator wherein each subsystem, according to whether or not the state of the sub-circuit of the subsystem has advanced or not, outputs a grant notice for granting permission to advance to the following emulation clock cycle to another subsystem. If a signal, which is a signal that has been output from the sub-circuit of the subsystem and which is to be transmitted to a sub-circuit of another subsystem, has changed, then a transfer request of the signal is output to the other subsystem by the time of the following emulation clock cycle. In the case that a signal from the sub-circuit of the first-mentioned subsystem to a sub-circuit of another subsystem has not been transferred, when the grant notice has been received from another subsystem and the transfer request has not been received, a clock signal for the sub-circuit of the first-mentioned subsystem is output, and the sub-circuit of the first-mentioned subsystem is made to advance to the following emulation clock cycle. In a logical circuit emulator which includes a plurality of subsystems, the speed of the emulation clock is increased. |
