JOINT IMPLEMENTATION OF INTELLECTUAL PROPERTIES (IPs) IN A SYSTEM-ON-A-CHIP (SOC)

摘要

A method includes jointly implementing a number of Intellectual Property (IP) sub-systems in a virtual design associated with one or more System-on-a-Chip(s) (SoC(s)) utilizing a design platform. Each sub-system of the number of IP sub-systems is associated with an IP configured to be a deliverable to the one or more SoC(s). The method also includes maintaining each sub-system of the number of IP sub-systems as an independent entity in the virtual design through an appropriate handling of a design closure and a timing closure. IPs associated with two or more IP sub-systems of the virtual design are related or unrelated to one another. ea