发明名称 Contemporaneous Margin Verification And Memory Access For Memory Cells In Cross-Point Memory Arrays
摘要 Circuitry for restoring data values in re-writable non-volatile memory is disclosed. An integrated circuit includes a memory access circuit and a sensing circuit configured to sense a data signal during a read operation to at least one two-terminal non-volatile cross-point memory array. Each memory array includes a plurality of two-terminal memory elements. A plurality of the memory arrays can be fabricated over the substrate and vertically stacked on one another. Further, the integrated circuit can include a margin manager circuit configured to manage a read margin for the two-terminal memory elements substantially during the read operation, thereby providing for contemporaneous read and margin determination operations. Stored data read from the two-terminal memory elements may have a value of the stored data restored (e.g., re-written to the same cell or another cell) if the value is not associated with a read margin (e.g., a hard programmed or hard erased state).
申请公布号 US2011267871(A1) 申请公布日期 2011.11.03
申请号 US201113181438 申请日期 2011.07.12
申请人 UNITY SEMICONDUCTOR CORPORATION 发明人 SIAU CHANG HUA;CHEVALLIER CHRISTOPHE
分类号 G11C11/00 主分类号 G11C11/00
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