PASSIVE COMPONENT-STACKED SEMICONDUCTOR CHIP, 3-DIMENSIONAL MULTI-CHIP AND 3-DIMENSIONAL MULTI-CHIP PACKAGE HAVING THE SAME

摘要

PURPOSE: A semiconductor chip with a passive device, a three dimensional multi chip including the same, and a three dimensional multi chip package including the same are provided to reduce power noise by electrically connecting the passive devices to the semiconductor chip. CONSTITUTION: A semiconductor chip with a passive device(130) includes a substrate, active layer, a passive device, and a plurality of through silicon vias. The active layer includes integrated devices, power patterns, ground patterns, and signal patterns(127) and is formed on one side of the substrate. A plurality of through silicon vias(114) passes through the substrate to electrically connect the passive device to the integrated device and is surrounded with SiO2. A part of through silicon vias transmits power voltage to the passive device. The remaining through silicon vias transmit the ground voltage to the passive devices.