| 摘要 |
A binary arithmetic decoding apparatus includes first, second and third pairs of look-up tables and first, second and third multiplexers. The first multiplexer selects between the respective outputs of the two look-up tables of the first pair of look-up tables. The second multiplexer selects between the respective outputs of a first look-up table of the second pair of look-up tables and of a first look-up table of the third pair of look-up tables. The third multiplexer selects between the respective outputs of a second look-up table of the second pair of look-up tables and of a second look-up table of the third pair of look-up tables. The three multiplexers are controlled in common. |
