| 摘要 |
The invention relates to a field effect transistor of the cavity-on-insulator type and to a process for making the same. According to the invention, the transistor comprises a silicon substrate (1) coated with a silicon oxide layer (2) on top of which there is placed a p-type silicon layer (10), on the silicon oxide layer (2) there being placed two high and n-doped semiconductor islands (3, 4) connected to each other by means of a p-type semiconductor film (9) having a thickness of less than 4 nm, above which there is allowed the presence of a vacuum cavity (5) occupying the whole space between the nislands (3, 4) which are connected to a source terminal (6) and a drain terminal (7), while on the back of the structure (1) there is placed a gate terminal (8). The process claimed by the invention comprises the following stages: selecting a silicon-on-insulator structure with a single-crystal initial layer, applying layer thinning techniques, then, within a first masking operation, defining some nislands, namely a source one and a drain one, controlled-doped with donor impurities, followed by a second masking operation, namely etching the p silicon layer and laying the metal contacts, within a third masking operation, on the nregions for the source and drain terminals and on the back of the structure for the gate terminal, the final stage comprising the operations of cutting out, sealing and encapsulation. |
