发明名称 METHOD, PROGRAM AND APPARATUS FOR AIDING WIRING DESIGN
摘要 PROBLEM TO BE SOLVED: To improve design accuracy of wiring routes of buses.SOLUTION: A computer executes: a wiring plan generation procedure for generating a wiring plan so that routes of a plurality of buses respectively represented by graphics may not cross with each other in a wiring area including one or more wiring layers; a validity determination procedure for verifying, in each bus, whether a wire of each belonging net of the bus can be drawn out from the inside of a component to which the bus is connected; and a wiring plan decision procedure for recording graphics indicating the belonging nets of buses confirmed that all the belonging nets can be drawn out by the validity determiner, in the wiring area: and, in respect to the buses confirmed by the validity determination procedure that at least part of the belonging nets can not be drawn out, reexecutes the wiring plan generation procedure.
申请公布号 JP2011215874(A) 申请公布日期 2011.10.27
申请号 JP20100083262 申请日期 2010.03.31
申请人 FUJITSU LTD 发明人 OTSUKA IKUO;KONNO EIICHI;ODA TAKAHIKO;NISHIO YOSHITAKA;SAKATA TOSHIYASU
分类号 G06F17/50;H01L21/82 主分类号 G06F17/50
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