发明名称 ESD TRIGGER FOR SYSTEM LEVEL ESD EVENTS
摘要 A circuit includes first logic that generates a first signal suitable to activate at least one ESD clamp in response to an electrostatic discharge (ESD) event having a first severity or a second severity higher than the first severity, and second logic that generates a second signal suitable to activate the ESD clamp in response to the ESD event having the second severity, the second signal time multiplexed with the first signal.
申请公布号 US2011261489(A1) 申请公布日期 2011.10.27
申请号 US201113089464 申请日期 2011.04.19
申请人 CYPRESS SEMICONDUCTOR CORPORATION 发明人 ZUPCAU DAN
分类号 H02H9/04 主分类号 H02H9/04
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