发明名称 Production of a memory unit with independent self-aligned gates
摘要 The method involves forming a diblock copolymer layer above a gate material layer resting on a support. Polymer blocks are selectively withdrawn from a diblock polymer layer for conserving patterns separated by a distance. A transistor gate block (110a) and a sacrificial block (110b) are formed by engraving the gate material layer through parallelepiped patterns, where the gate and sacrificial blocks are separated by a space. Another gate material layer and insulating layers are formed in the space. The sacrificial block is removed.
申请公布号 EP2381471(A1) 申请公布日期 2011.10.26
申请号 EP20110163259 申请日期 2011.04.20
申请人 COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIESALTERNATIVES;CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE 发明人 MOLAS, GABRIEL;BARON, THIERRY
分类号 H01L21/8247;H01L21/28;H01L21/336;H01L27/115;H01L29/423;H01L29/66;H01L29/792 主分类号 H01L21/8247
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