| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor device which secures a phase margin by applying a digital compensation circuit advantageous in process migration in order to maintain characteristics while reducing the area of a phase locked loop circuit.SOLUTION: A digital compensation phase locked loop circuit 200 of the semiconductor device includes: a phase locked loop circuit 100 including a voltage controlled oscillator 104 having capacitors at oscillation nodes and consecutively controlled by an applied voltage; and a digital compensation circuit 201 which variably controls the capacitors at the oscillation nodes of the voltage controlled oscillator 104 in accordance with an input phase difference. A gain of the conventional voltage controlled oscillator 104, whose gain is determined by an applied voltage, is discretely changed by a control signal of the digital compensation circuit 201. The digital compensation circuit 201 dynamically controls the gain so as to secure the optimum phase margin, by applying a load to the oscillation node of the voltage controlled oscillator 104 with respect to a phase lead and decreasing the load with respect to a phase delay. |
