发明名称 FAIR AND EFFICIENT SCHEDULING OF VARIABLE-SIZE DATA PACKETS IN AN INPUT-BUFFERED MULTIPOINT SWITCH
摘要 <p>An input-buffered multipoint switch having input channels and output channels includes multi-level request buffers, a data path multiplexer, and a scheduler. The switch has a distinct multi-level request buffer associated with each input channel and each request buffer has multiple request registers for storing data cell transfer requests of different priorities. The multi-level request registers are linked in parallel to the scheduler to allow arbitration among requests of different input channels and different priority levels. The preferred arbitration process involves generating masks that reflect the output channels required by the same priority level requests. Utilizing masks to arbitrate between multiple requests in an input-buffered switch reduces arbitration cycle time and minimizes HOL blocking.</p>
申请公布号 EP0981878(B1) 申请公布日期 2011.10.19
申请号 EP19990911067 申请日期 1999.03.03
申请人 RIVERSTONE NETWORKS, INC. 发明人 AYBAY, GUENES;FEROLITO, PHILIP ARNOLD
分类号 H04L12/70;H04L12/931;H04L12/933;H04L12/935;H04L12/937;H04Q11/04 主分类号 H04L12/70
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