发明名称 Three dimensional memory in a system on a chip
摘要 The invention relates to multi-planar memory components in a three-dimensional integrated circuit system configuration. A multi-planar memory system consisting of a plurality of memory circuit planes in a three-dimensional system on a chip (3D SoC) comprised of a plurality of memory layers, at least one logic circuit layer and an interface configured to provide access to memory and logic circuit layers.
申请公布号 US8042082(B2) 申请公布日期 2011.10.18
申请号 US20080283455 申请日期 2008.09.12
申请人 发明人 SOLOMON NEAL
分类号 G06F17/50 主分类号 G06F17/50
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