发明名称 |
Charge mapping memory array formed of materials with mutable electrical characteristics |
摘要 |
A memory cell array including a data line; a capacitor; and a transistor coupled between the data line and the capacitor. At least one of the capacitor and the transistor includes a material with a mutable electrical characteristic. A memory cell array including a first transistor coupled between a first node, a second node, and a third node; and a second transistor coupled between the second node and a fourth node. The first transistor includes a material with a mutable electrical characteristic.
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申请公布号 |
US8040729(B2) |
申请公布日期 |
2011.10.18 |
申请号 |
US20090621801 |
申请日期 |
2009.11.19 |
申请人 |
PALO ALTO RESEARCH CENTER INCORPORATED |
发明人 |
WONG WILLIAM S.;SAMBANDAN SANJIV;NG TSE NGA;STREET ROBERT A. |
分类号 |
G11C16/04 |
主分类号 |
G11C16/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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