发明名称 INTEGRATED CIRCUIT MANUFACTURING METHOD, DESIGN METHOD AND PROGRAM
摘要 An integrated circuit manufacturing method comprising: calculating a threshold value from a value of a parameter which characterizes at least a part of a design pattern shape of a transistor on the target path; calculating a difference between the calculated threshold value and a target threshold value; calculating a change quantity of a gate length corresponding to the difference between the threshold value and the target threshold value according to the functional relation between the threshold value of the transistor and the gate length, which is determined based on the empirical value or the experimental value; reducing, by the change quantity, the gate length of the transistor on the target path; and manufacturing an integrated circuit on the basis of design information of the circuit including the transistor of which the gate length is changed.
申请公布号 US2011252391(A1) 申请公布日期 2011.10.13
申请号 US201113075789 申请日期 2011.03.30
申请人 FUJITSU SEMICONDUCTOR LIMITED 发明人 ARIMOTO HIROSHI
分类号 G06F17/50 主分类号 G06F17/50
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