DLL CIRCUIT, AND REPLICA CIRCUIT USED THEREFOR

摘要

PROBLEM TO BE SOLVED: To provide a DLL circuit which has no limitation in layout.SOLUTION: A replica circuit used for the DLL circuit includes a delay circuit to which a first power supply voltage is supplied and an input clock signal to a clock buffer is inputted and from which a replica clock signal is outputted. The delay circuit is obtained by cascading first to M-th CMOS inverter circuits and (M+1)th to N-th CMOS inverter circuits. A plurality of transistors are connected to sources of n-channel MOS transistors of the (M+1)th to the N-th CMOS inverter circuits at a post-stage side of the delay circuit. A low-pass filter circuit low-pass-filters a second power supply voltage that is different from the first power supply voltage, and supplies the low-pass-filtered power supply voltage to control terminals of the plurality of transistors.