发明名称 System and method for equalizing an incoming signal
摘要 An equalizer is provided, including: a feedback combiner to combine an input signal and a feedback signal to produce a first signal; a delay line to delay the first signal to produce a second signal; a feed-forward combiner to combine the second signal and a feed-forward signal to produce an output signal; an interim decision circuit to extract a sign bit from the first signal; N feedback scaling elements to generate N scaled feedback signals; M feed-forward scaling elements to generate M scaled feed forward signals; a feedback circuit to pass the N scaled feedback signals through feedback delay elements and feedback summing elements to generate the feedback signal in response to the sign bit; and a feed forward circuit to pass the M scaled feed forward signals through feed-forward delay elements and feed-forward summing elements to generate the feed-forward signal in response to the sign bit.
申请公布号 US8036260(B2) 申请公布日期 2011.10.11
申请号 US20070896184 申请日期 2007.08.30
申请人 FREESCALE SEMICONDUCTOR, INC. 发明人 DHAR KAUSHAL K.;MILLER TIMOTHY R.
分类号 H03H7/30;H03K5/159 主分类号 H03H7/30
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