发明名称 Complementary mirror image embedded planar resistor architecture
摘要 A complementary mirror image embedded planar resistor architecture is provided. In the architecture, a complementary hollow structure is formed on a ground plane or an electrode plane to minimize the parasitic resistance, so as to efficiently enhance the application frequency. In addition, in some cases, some signal transmission lines pass through the position below the embedded planar resistor, and if there is no shield at all, serious interference or cross talk phenomenon occurs. Therefore, the complementary hollow structure of the ground plane, the electrode plane, or a power layer adjacent to the embedded planar resistor is designed to be a mesh structure, so as to reduce the interference or cross talk phenomenon. In this manner, the whole resistor structure has preferable high frequency electrical characteristic in the circuit.
申请公布号 US8035036(B2) 申请公布日期 2011.10.11
申请号 US20070861297 申请日期 2007.09.26
申请人 INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE 发明人 JOW UEI-MING;LEE MIN-LIN;LAY SHINN-JUH;SHYU CHIN-SUN;CHEN CHANG-SHENG;LAI YING-JIUNN
分类号 H05K1/16 主分类号 H05K1/16
代理机构 代理人
主权项
地址