发明名称 Efficient clock models and their use in simulation
摘要 Methods simulating a system of devices are described. A model that simulates the system is executed. The system model includes a plurality of modules. A clock object for a module can be disabled when it is not needed or not being used.
申请公布号 US8036873(B2) 申请公布日期 2011.10.11
申请号 US20050069616 申请日期 2005.02.28
申请人 SYNOPSYS, INC. 发明人 VERMEERSCH DIRK;VAN ROMPAY KARL
分类号 G06F17/50;G06F1/04 主分类号 G06F17/50
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