| 摘要 |
Provided are a method and apparatus for controlling direct memory access. In the method, data to be transmitted are read and stored in response to a direct memory access controller (DMAC) operation request, and a portion of the data corresponding to an initial burst size is first transmitted to a data destination. After resetting a burst size according to a state of the data destination, another portion of the data corresponding to the reset burst size is second-transmitted to the data destination. If all the data are not transmitted through the first-transmission and the second-transmission, the second-transmission is repeated until all the data are transmitted. If all the data are transmitted through the first-transmission and the second-transmission, an interrupt signal is generated. Therefore, interrupt signals can be less generated, and thus the processor can access an external memory less frequently, thereby increasing system performance.
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