发明名称 APPARATUS AND METHOD FOR DECODING ERROR CORRECTION CODE
摘要 PROBLEM TO BE SOLVED: To shorten the whole processing time, while improving reliability of data read from a NAND flash memory or the like by using hard-decision decoding and soft-decision decoding.SOLUTION: An error correction code decoding apparatus includes: a hard-decision decoding part 11 for executing hard-decision decoding using a signal of binary value per bit as input data and executing parity check for the input data; a soft-decision decoding part 13 for executing soft-decision decoding using a signal whose number of multiple levels per bit is larger than 2 as input data; a start-up control part 14 for controlling start-up of the hard-decision decoding part 11 and the soft-decision decoding part 13; and an output selection part 15 for selecting either one of respective output signals from the hard-decision decoding part 11 and the soft-decision decoding part 13 and outputting the selected output signal. When the number of parity errors is within an allowable value, a decoded result of the hard-decision decoding part 11 is selected and output, and when the number of parity errors exceeds the allowable value, the soft-decision decoding part 13 is started up and a soft-decision decoding result is selected and output.
申请公布号 JP2011197957(A) 申请公布日期 2011.10.06
申请号 JP20100063320 申请日期 2010.03.18
申请人 TOSHIBA CORP 发明人 HORISAKI KOJI
分类号 G06F12/16;G11C16/02;G11C16/06;G11C29/42;H03M13/37 主分类号 G06F12/16
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