| 摘要 |
PROBLEM TO BE SOLVED: To provide a memory control device, a memory control system, a recording device and a memory control method, allowing improvement of latency when accessing a dynamic RAM.SOLUTION: This memory control device 37 imposed between a plurality of masters M1-Mn and a DRAM (Dynamic Random Access Memory) includes a memory sequence control circuit 64, and a latency improvement circuit 67 or the like. The latency improvement circuit 67 includes a master number decision circuit 71, a page hit rate decision circuit 72, and a page control circuit 73. The master number decision circuit 71 decides whether the number of access masters in a specific time is not more than the number of effective banks (e.g. "8"), and the page hit rate decision circuit 72 decides whether a page hit rate is not less than a setting value Q (in this example, 50%). The page control circuit 73 outputs a page open control signal Sopen when satisfying both conditions, and outputs a page close control signal Sclose when not satisfying any condition. |
