发明名称 |
APPARATUS AND METHOD FOR CALCULATION CAPACITANCE BETWEEN POWER SUPPLIES OF INTEGRATED CIRCUIT |
摘要 |
PROBLEM TO BE SOLVED: To provide a calculation apparatus capable of highly accurately calculating capacitance between power supply lines of an integrated circuit while suppressing an increase in calculation time even when a circuit scale is increased.SOLUTION: An input vector analysis part 12 analyzes logical value information indicating a logical value input to an input terminal of each logical element on the basis of an input vector. A logical element capacitance integration part 14 refers to a reference cell capacitance information storage part 15 and integrates parasitic capacitance of respective logical elements from the logical value information. An inter-wire capacitance integration part 16 refers to an inter-wire capacitance information storage part 17 and integrates parasitic capacitance of wires arranged between respective logical elements. A total capacitance addition output part 18 outputs a total value of the parasitic capacitance integrated by the logical element capacitance integration part 14 and the parasitic capacitance integrated by the inter-wire capacitance integration part 16 as capacitance between power supplies of the integrated circuit. |
申请公布号 |
JP2011197895(A) |
申请公布日期 |
2011.10.06 |
申请号 |
JP20100062646 |
申请日期 |
2010.03.18 |
申请人 |
TOKYO INSTITUTE OF TECHNOLOGY |
发明人 |
EKI KAZUYA;YAMANAGA ISAO;HAGIWARA SHIO;SATO TAKASHI |
分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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