发明名称 |
FET with FUSI Gate and Reduced Source/Drain Contact Resistance |
摘要 |
A method for forming a field effect transistor (FET) includes forming a gate stack on a silicon layer, the gate stack comprising a gate polysilicon on top of a gate oxide layer; forming a fully silicided gate from the gate polysilicon and forming source/drain silicide regions in the silicon layer; implanting the gate silicide and the source/drain silicide with dopants; and performing rapid thermal annealing to form a gate interfacial layer in between the gate silicide and the gate oxide layer, and source/drain interfacial layers between the source/drain silicide regions and the silicon layer.
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申请公布号 |
US2011241116(A1) |
申请公布日期 |
2011.10.06 |
申请号 |
US20100754881 |
申请日期 |
2010.04.06 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
LAVOIE CHRISTIAN;NING TAK H.;OUYANG QIQING;SOLOMON PAUL;ZHEN ZHANG |
分类号 |
H01L29/786;H01L21/336 |
主分类号 |
H01L29/786 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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