发明名称 VIDEO ENCODER AND METHOD FOR SYNCHRONIZING TIMING FROM ENCODER TO DECODER
摘要 PROBLEM TO BE SOLVED: To synchronize a multiplexing and transport packetizing apparatus.SOLUTION: An apparatus for developing synchronization of an intermediate layer of signal such as a transport or multiplex layer of a multi-layered compressed video signal, includes at the encoding end of the system a counter 23 which is clocked responsive to a system clock 22, and the count valued is embedded by a processor 13 in the signal at the transport layer according to a predetermined schedule. At the receiving end of the system an inverse transport processor 18 provides PCR from auxiliary transport data, and control signals to a system clock generator 27. The clock generator 27 responsive to these signals generates a system clock signal synchronous with at least the operation of the transport processor 18. This system clock signal is supplied to the receiver system controller 26 to control the timing of appropriate processing elements.
申请公布号 JP2011199891(A) 申请公布日期 2011.10.06
申请号 JP20110111307 申请日期 2011.05.18
申请人 THOMSON CONSUMER ELECTRONICS INC 发明人 DEISS MICHAEL S
分类号 H04B1/66;H04N7/173;G06T9/00;H03L7/085;H03L7/181;H04J3/00;H04L7/00;H04L7/033;H04L12/70;H04L13/08;H04N7/08;H04N7/081;H04N7/24;H04N7/62;H04N11/04;H04N19/00;H04N19/89;H04N21/236;H04N21/43;H04N21/434 主分类号 H04B1/66
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