发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT AND MANUFACTURING METHOD THEREOF
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit employing a structure which mitigates the mechanical and dynamic stress due to probing during inspection as well as the stress due to the mechanical and dynamic stress by wire bonding during assembly.SOLUTION: The semiconductor integrated circuit includes a power transistor (100A) formed on a semiconductor substrate (100), a plurality of first metallic patterns formed directly on the power transistor (100A) so as to function as a first electrode of the power transistor, a plurality of second metallic patterns formed directly on the power transistor (100A) so as to function as a second electrode of the power transistor, a first bus (140) electrically connected to the plurality of first metallic patterns, a second bus (150) electrically connected to the plurality of second metallic patterns, and a contact pad (304) prepared on each of the first bus (140) and the second bus (150). Here, at least one slit (10a) is formed on the each of the first bus (140) and the second bus (150).
申请公布号 JP2011199320(A) 申请公布日期 2011.10.06
申请号 JP20110144648 申请日期 2011.06.29
申请人 PANASONIC CORP 发明人 FUKAMIZU SHINGO;NABESHIMA TAMOTSU;NISHINO HIDEKI
分类号 H01L23/52;H01L21/3205;H01L21/60 主分类号 H01L23/52
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