发明名称 EXPOSURE MASK, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE HAVING IMPURITY LAYER, AND SOLID-STATE IMAGING DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device having an impurity layer suppressing generation of a potential dip.SOLUTION: The method has steps of: exposing a resist material 9 applied on a semiconductor substrate 8 by using a grating mask 1, which comprises a first region 2-1 composed of a plurality of dot patterns 3 and a second region 2-2 adjoining to the first region 2-1 and composed of a plurality of dot patterns 4 having a larger area than the pattern of the region 2-1, with the transmittance for light discontinuously changing in the boundary between the regions 2-1 and 2-2, wherein a dot pattern 6 having a medium area between the above dot patterns is disposed between the dot pattern 3 of the first region 2-1 and the dot pattern 4 of the second region 2-2; forming a resist film 10 by developing the exposed resist material 9; and forming an impurity layer 11 by injecting ions into the semiconductor substrate 8 by using the resist film as a mask.
申请公布号 JP2011197553(A) 申请公布日期 2011.10.06
申请号 JP20100066585 申请日期 2010.03.23
申请人 TOSHIBA CORP 发明人 TOMITA TAKESHI
分类号 G03F1/00;G03F1/70;H01L21/027;H01L27/148;H04N5/367;H04N5/369 主分类号 G03F1/00
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