发明名称 |
Memory Checkpointing Using A Co-Located Processor and Service Processor |
摘要 |
A system and method is shown that includes a processor operatively connected to a memory, the processor to include a memory controller to control access to the memory. The system and method also includes a service processor, co-located on a common board and operatively connected to the processor and the memory, the service processor to include an additional memory controller to control access to the memory as part of a checkpoint regime.
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申请公布号 |
US2011246828(A1) |
申请公布日期 |
2011.10.06 |
申请号 |
US20100751005 |
申请日期 |
2010.03.31 |
申请人 |
MONCHIERO MATTEO;MURALIMANOHAR NAVEEN;RANGANATHAN PARTHA |
发明人 |
MONCHIERO MATTEO;MURALIMANOHAR NAVEEN;RANGANATHAN PARTHA |
分类号 |
G06F11/07;G06F12/00;G06F13/14 |
主分类号 |
G06F11/07 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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