发明名称 |
Test access architecture for TSV-based 3D stacked ICS |
摘要 |
<p>A test access architecture is presented for 3D-SICs that allows for both pre-bond die testing and post-bond stack testing. The test access architecture is based on a modular test approach, in which the various dies, their embedded IP cores, the inter-die TSV-based interconnects, and the external I/Os can be tested as separate units to allow optimization of the 3D-SIC test flow. The architecture builds on and reuses existing design for test (DfT) hardware at the core, die, and product level. Test access is provided to an individual die stack via a test structure called a wrapper unit.</p> |
申请公布号 |
EP2372379(A1) |
申请公布日期 |
2011.10.05 |
申请号 |
EP20100177675 |
申请日期 |
2010.09.20 |
申请人 |
IMEC;STICHTING IMEC NEDERLAND |
发明人 |
MARINISSEN, ERIK JAN;VERBREE, JACOBUS;KONIJNENBURG, MARIO;CHI, CHUN-CHUAN |
分类号 |
G01R31/3185 |
主分类号 |
G01R31/3185 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|