发明名称 INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACKING OPTION AND METHOD OF MANUFACTURE THEREOF
摘要 A method of manufacture of an integrated circuit packaging system includes: fabricating a base package substrate having a component side and a system side; coupling a first integrated circuit die on the component side; coupling stacking interconnects on the component side around the first integrated circuit die; forming a package body on the component side, the first integrated circuit die, and the stacking interconnects; forming vertical insertion cavities through the package body and on the stacking interconnects; and forming a trench, in the package body, adjacent to the vertical insertion cavities for reducing a package warping stress.
申请公布号 KR20110107766(A) 申请公布日期 2011.10.04
申请号 KR20110026438 申请日期 2011.03.24
申请人 STATS CHIPPAC LTD. 发明人 LEE, SEONG MIN;MUN, SEONG HUN;HAN, BYUNG JOON
分类号 H01L23/04;H01L23/12;H01L23/48 主分类号 H01L23/04
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