| 摘要 |
There is offered a switching resistance RAM that is very much reduced in an occupied area and is highly integrated. Memory cells CEL11-CEL14 are formed corresponding to four intersections of word lines WL0 and WL1 and bit lines BL0 and BL1. Each of the memory cells CEL11-CEL14 are composed of a switching layer 13 formed on a surface of an N+ type Si layer 11. The switching layer 13 is electrically connected to the bit line BL0 or BL1 thereabove through an electrode 14. The switching layer 13 is composed of a SiC layer 13A stacked on the surface of the N+ type Si layer 11 and a Si oxide layer 13B stacked on the SiC layer 13A. A top surface of the Si oxide layer 13B, that is the uppermost layer of the switching layer 13, is electrically connected to the corresponding bit line BL0 or BL1.
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