发明名称 Voltage regulator circuit for a memory circuit
摘要 A voltage regulator circuit for a memory circuit comprises a voltage divider, a capacitor, an active-mode voltage regulator and a standby-mode voltage regulator. The active-mode voltage regulator is always on while in active mode, and turned on whenever a refresh is requested. The standby-mode voltage regulator is periodically turned on while in standby mode, and turned on whenever a refresh is requested. In addition, the active voltage regulator uses stronger transistors than those used by the standby-mode voltage regulator, and both the active-mode voltage regulator and the standby-mode voltage regulator are coupled to the voltage divider and the capacitor.
申请公布号 US8031550(B2) 申请公布日期 2011.10.04
申请号 US20080132098 申请日期 2008.06.03
申请人 ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. 发明人 CHEN CHUNG ZEN
分类号 G11C5/14 主分类号 G11C5/14
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