发明名称 FAILSAFE OSCILLATOR MONITOR AND ALARM
摘要 A failsafe oscillator monitor and alarm circuit receives clock pulses from an external oscillator that if a failure thereto occurs, the failsafe oscillator monitor and alarm circuit will notify a digital processor of the external oscillator failure. The failsafe oscillator monitor and alarm circuit is a very low current usage circuit that charges a storage capacitor with clock pulses from the external oscillator when functioning normally and discharges the storage capacitor with a constant current sink if the external oscillator stops functioning. When the voltage charge on the storage capacitor becomes less than a reference voltage an alarm signal is sent to the digital processor for exception or error handling of the failed external oscillator.
申请公布号 WO2011119790(A1) 申请公布日期 2011.09.29
申请号 WO2011US29719 申请日期 2011.03.24
申请人 MICROCHIP TECHNOLOGY INCORPORATED;ALEMAN, ENRIQUE;DILLON, JONATHAN;DELPORT, VIVIEN;JULICHER, JOSEPH 发明人 ALEMAN, ENRIQUE;DILLON, JONATHAN;DELPORT, VIVIEN;JULICHER, JOSEPH
分类号 G06F1/14;G01R19/165 主分类号 G06F1/14
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