发明名称 CONFIGURATION METHOD, AND CONFIGURATION CONTROL CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To automatically adjust a clock frequency of an FPGA circuit and configuration data such as a through rate, in a configuration method and a configuration control circuit. <P>SOLUTION: This configuration method performs a configuration of a FPGA circuit. The method counts, within the FPGA circuit, a number of times the configuration for setting configuration data from a configuration circuit to the FPGA circuit fails. The method adjusts, within the FPGA circuit, the configuration data when the configuration has failed if the counted number is not larger than an upper limit value according to a preset rule, and re-executes the configuration. The method is configure to set the configuration data at the time the configuration has been successfully performed from the FPGA circuit to the configuration circuit when the configuration is successful. <P>COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2011193129(A) 申请公布日期 2011.09.29
申请号 JP20100056298 申请日期 2010.03.12
申请人 FUJITSU LTD 发明人 WATANABE HIROAKI;MAEZAWA NAOKI;DEGUCHI CHIKAHIRO
分类号 H03K19/177;G06F11/14;G06F17/50 主分类号 H03K19/177
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