| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a selector circuit capable of coping with flexibly to a certain extent, a change in the bit order of data received in a data transfer system while suppressing an increase of a circuit scale. <P>SOLUTION: A selector circuit 3 includes: channel swap circuits 11a-11e each outputting input bits while keeping the order of bits as they are, or for outputting the bits after changing the order of the bits; an internal bus 12 for transmitting the respective bits outputted from the channel swap circuits 11a-11e; and data field designating circuits 14a, 14b, 14c each selecting and taking out the predetermined number of continuous bits on the internal bus. Bits of input data are inputted to one of the channel swap circuits 11a-11e, and each of pieces of output data contains a plurality of bits taken out by one of the data field designating circuits 14a, 14b, 14c. <P>COPYRIGHT: (C)2011,JPO&INPIT |
