发明名称 VERTICAL SOI BIPOLAR JUNCTION TRANSISTOR AND MANUFACTURING METHOD THEREOF
摘要 The present invention discloses a vertical SOI bipolar junction transistor and a manufacturing method thereof. The bipolar junction transistor includes an SOI substrate from down to up including a body region, a buried oxide layer and a top silicon film; an active region located in the top silicon film formed by STI process; a collector region located in the active region deep close to the buried oxide layer formed by ion implantation; a base region located in the active region deep close to the top silicon film formed by ion implantation; an emitter and a base electrode both located over the base region; a side-wall spacer located around the emitter and the base electrode. The present invention utilizing a simple double poly silicon technology not only can improve the performance of the transistor, but also can reduce the area of the active region in order to increase the integration density. Furthermore, the present invention utilizes side-wall spacer process to improve the compatibility of SOI BJT and SOI CMOS, which simplifies the SOI BiCMOS process and thus reduce the cost.
申请公布号 US2011233727(A1) 申请公布日期 2011.09.29
申请号 US201013055577 申请日期 2010.07.14
申请人 SHANGHAI INSTITUTE OF MICROELECTRONICS AND INFORMATION TECHNOLOGY, CHINESE ACADEMY 发明人 CHEN JING;LUO JIEXIN;WU QINGQING;ZHOU JIANHUA;HUANG XIAOLU;WANG XI
分类号 H01L29/70;H01L21/328 主分类号 H01L29/70
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