发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 According to one embodiment, a semiconductor memory device comprises a memory cell array, a controller. A memory cell array comprises bit lines, and memory cells configured to store different states, i.e., m values or n values. When storing the n values in a memory cell, the controller performs a first method of applying a bit-line voltage to a first bit line connected to the memory cell, and setting a second bit line adjacent to the first bit line at 0 V, in a read operation and in a verify operation. When storing the m values in the memory cell, the controller performs a second method of applying the bit-line voltage to all the bit lines in a read operation, and setting the first bit line and the second bit line at the bit-line voltage or 0 V in a verify operation, in accordance with whether the write is complete.
申请公布号 US2011235414(A1) 申请公布日期 2011.09.29
申请号 US201113052375 申请日期 2011.03.21
申请人 IKEDA TAKAFUMI;MUROTANI HIROKI 发明人 IKEDA TAKAFUMI;MUROTANI HIROKI
分类号 G11C16/10;G11C16/04;G11C16/06 主分类号 G11C16/10
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