METHOD, SYSTEM AND APPARATUS FOR TRI-STATING UNUSED DATA BYTES DURING DDR DRAM WRITES

摘要

A memory interface circuit includes a plurality of data bus drivers and logic adapted to be operatively responsive to write driver mask information. If desired, the plurality of bus drivers and the logic may be implemented in separate integrated circuits. The plurality of bus drivers are adapted to be responsive to a write operation. The logic is also adapted to disable any one of the plurality of data bus drivers based on the write driver mask information during the write operation.