| 摘要 |
A meander-type pulse packet shaper with adjustable pulse length and fixed quantity equal to three comprises two reversible counterdown binary counters, each of which having a clock input, synchronous parallel load and loading data enable input, counting mode enable input, asynchronous reset, overflow output, invertor, first and second OR elements, a circuit comprising in series connected resistor and capacitor, a start-stop device comprising a synchronous D flip-flop with asynchronous reset, first and second AND elements. Second invertor and two J-K flip-flops with asynchronous reset are incorporated; each J-K flip-flop has by two J and K inputs, AND inputs are united. |
