| 摘要 |
A flexible and hardware-effective LDPC-decoder is proposed. The decoder is implemented with parallelism level which is less than full parallelism of code structure, which is used for control of decoding process. Every command for simple control code using for description of code structure can be saved and performed several times to decode a code word. Different value of code word length is maintained using one set of control code commands; code is implemented several times depending on code word length. The decoder may switch between decoding code words of different length without change of code description saved information, using change of code extension factor, which indicates code word length and is used for decoding process control. While decoding, same cells of shorter length than maximal code words length may not be used. |
