发明名称 |
TRENCH DMOS DEVICE WITH IMPROVED TERMINATION STRUCTURE FOR HIGH VOLTAGE APPLICATIONS |
摘要 |
A termination structure for a power transistor includes a semiconductor substrate having an active region and a termination region. The substrate has a first type of conductivity. A termination trench is located in the termination region and extends from a boundary of the active region to within a certain distance of an edge of the semiconductor substrate. A doped region has a second type of conductivity disposed in the substrate below the termination trench. A MOS gate is formed on a sidewall adjacent the boundary. The doped region extends from below a portion of the MOS gate spaced apart from the boundary toward a remote sidewall of the termination trench. A termination structure oxide layer is formed on the termination trench and covers a portion of the MOS gate and extends toward the edge of the substrate. A first conductive layer is formed on a backside surface of the semiconductor substrate. A second conductive layer is formed atop the active region, an exposed portion of the MOS gate, and extends to cover at least a portion of the termination structure oxide layer.
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申请公布号 |
US2011227152(A1) |
申请公布日期 |
2011.09.22 |
申请号 |
US20100909033 |
申请日期 |
2010.10.21 |
申请人 |
VISHAY GENERAL SEMICONDUCTOR LLC |
发明人 |
HSU CHIH-WEI;UDREA FLORIN;LIN YIH-YIN |
分类号 |
H01L27/06 |
主分类号 |
H01L27/06 |
代理机构 |
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代理人 |
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地址 |
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